IBM claims world’s first sub-1 nanometer chip technology
Summary
IBM has developed a new chip design called the "nanostack" architecture that can fit nearly 100 billion transistors on a chip the size of a fingernail. This design, called the world’s first sub-1 nanometer chip technology, promises much better computing power and energy efficiency for artificial intelligence (AI) data centers.Key Facts
- IBM’s new chip can hold almost 100 billion transistors on a tiny chip about the size of a fingernail.
- The chip uses a sub-1 nanometer (0.7 nanometer) technology, which is called the 7 angstrom node.
- The "nanostack" technology stacks transistors vertically to pack more into the same space.
- Each transistor is made of three nanosheets, each about 5 nanometers thick, separated by 9 nanometers.
- IBM says this chip design can improve computer performance by 50% or increase energy efficiency by 70% compared to their previous 2-nanometer chips.
- The new design also offers a 40% improvement in memory scaling for SRAM, important for AI tasks.
- These advancements were presented at the 2025 IEEE Symposium on VLSI Technology and Circuits in Japan.
- The improvements could help overcome physical limits that have made shrinking chip features more difficult in recent years.
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